Differences
This shows you the differences between two versions of the page.
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| en:verilog:start [2014/09/08 09:49] – created alex | en:verilog:start [2019/07/12 19:28] (current) – alex | ||
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| ====== Verilog IP cores ====== | ====== Verilog IP cores ====== | ||
| + | * [[.:axi:]] | ||
| + | * [[.:axis:]] | ||
| * [[.: | * [[.: | ||
| + | * [[.:i2c:]] | ||
| + | * [[.: | ||
| + | * [[.:pcie:]] | ||
| * [[.:uart:]] | * [[.:uart:]] | ||
| * [[.: | * [[.: | ||
| + | * [[.:xfcp:]] | ||