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| en:verilog:mersenne:start [2014/09/17 01:52] – [Introduction] alex | en:verilog:mersenne:start [2014/11/09 09:01] (current) – [Introduction] alex | ||
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| 64 bit version on a Spartan 6: 175 MHz, 4 BRAMs, 388 FFs, 829 LUTs | 64 bit version on a Spartan 6: 175 MHz, 4 BRAMs, 388 FFs, 829 LUTs | ||
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| + | ===== Documentation ===== | ||
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| + | [[readme]] | ||
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| ===== Repository ===== | ===== Repository ===== | ||