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en:verilog:i2c:readme [2019/05/28 10:23] alex created |
en:verilog:i2c:readme [2019/05/28 10:24] (current) alex [Source Files] |
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| I2C slave module with parametrizable Wishbone master interface. | I2C slave module with parametrizable Wishbone master interface. | ||
| - | ===== Source Files ===== | + | ==== Source Files ==== |
| axis_fifo.v : AXI stream FIFO | axis_fifo.v : AXI stream FIFO | ||